I. Field of the Invention
The invention relates to display devices. More specifically, the invention describes a method and apparatus for using driving LCD panel drive electronics.
II. Overview
Liquid Crystal Displays (LCDs) have begun to supersede Cathode Ray Tube (CRT) based monitors in the monitor and television applications markets due in part to the fact that LCDs have several advantages compared to CRT based technology. These advantages include smaller size (60% less than comparable CRTs), lower power consumption (50%), lighter weight (70% less than CRT), no electromagnetic fields, and longer service life.
FIG. 1 is a block diagram showing an example of a conventional active matrix liquid crystal display device 100 that includes a liquid crystal display panel 102, a data (or a column) driver 104 that includes a number of data latches 106-1 through 106-n suitable for storing image data, a gate driver 108 that includes gate driver logic circuits 110, a timing controller unit (also referred to as a TCON) 112, and a memory 114 suitable for storing image data included in or coupled to the TCON 112. In some cases, the memory 114 takes the form of a frame memory capable of storing an entire video frame or in other cases, the memory 114 takes the form of a line buffer capable of storing a single line of video data. In either case, the image data is stored in the memory 114 in such a way as to be available to be transferred to the latches 106 one frame line at a time within a period of time referred to as a line period τ. As shown, a pixel clock generator unit 116 also included in or coupled to the TCON 112 is used to convert video data delivered at a link clock rate to the required pixel clock rate.
Typically, the TCON 112 is connected to a video source 128 (such as a personal computer, TV or other such device) suitably arranged to output a video signal (and, in most cases, an associated audio signal). During operation, the TCON 112 sends video data one pixel at a time by way of a multidrop bus 130 to be stored in a correspondingly enabled one of the data latches 106. For example, if the display panel has 1024 pixels per line then there are 1024 latches per line (it should be noted that in the case of a full color display, each pixel is formed of 3 subpixels, Red, Green, and Blue and therefore there are a total of 1024×3=3072 data latches) each of which is connected to the multidrop data bus 130. When the TCON 112 is loading the video data, a first latch receives a latch enable signal and stores the appropriate pixel data, after which a second latch receives the latch enable signal and stores the appropriate pixel data and so on until all 3072 latches have been enabled and stored the appropriate pixel data one at a time. In this way, for each frame line, the TCON 112 must send the all pixel data to the appropriate one of the 3072 data latches within the line period τ. Once all the video data for a particular frame line has been received and latched, the video data is then available to drive selected ones of a number of picture elements 118 included in the LCD array 102 used to form the displayed image.
Therefore, in order for the TCON 112 to provide the correct pixel data to the correct data latch, the TCON 112 must provide a handshake enable signal between each data latch 106 that must propagate from the leftmost data latch 106-1 to the rightmost data latch 106-n in such a way that all video data for a particular frame line is stored with the line period τ. Since even the rightmost data latch 106-n must be driven by the TCON 112, the number of pixels per line is limited by the ability of the TCON 112 to adequately drive the rightmost (and therefore most distant) data latch 106-n. The large number of components (3072 in the case of an 1024 RGB display) coupled to the large multidrop bus 130 presents a severe challenge to the TCON 112 to preserve signal integrity. Since signal integrity is crucial to the proper operation of the display 100, the data rate is typically reduced thereby severely limiting the resolution of the display 100 since all data for a single frame line must be transferred to all data latches 106 within a single line period τ which is typically about 20 microseconds.
One approach to solving this problem is to increase the size of the multidrop bus 130 that unfortunately also increases the line capacitance making it difficult to optimize the transmission of the data on the bus. Other approaches (such as reduced swing differential signaling or RSDS) use multiple busses with 2 pixels per clock instead of a single multidrop bus and a single pixel per clock. Although this approach reduces the drive capability required for the TCON 112, it has the unfortunate result of substantially increasing the complexity of the TCON driving circuitry (as well as doubling the number of pins). For example, in the case of 24 bit color, the RSDS approach would require 24 transmission lines in addition to a dedicated clock line greatly increasing the complexity of the LCD column driver 104.
Therefore a high speed, high bandwidth approach to driving an digital display is needed.